Publications

Journal Publications

Belenky, Y., Dushar, I., Teper, V., Bugaenko, V., Karavaev, O., Azriel, L., & Kreimer, Y. (2023). Carry-based Differential Power Analysis (CDPA) and its Application to Attacking HMAC-SHA-2. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2023(3), 1–29.

Azriel, L., Speith, J., Albartus, N. et al. “A survey of algorithmic methods in IC reverse engineering”. Journal of Cryptographic Engineering 11, 299–315 (2021).

Leonid Azriel et al, “Memory-Side Protection With a Capability Enforcement Co-Processor”,  ACM Transactions on Architecture and Code Optimization (TACO), Volume 16 Issue 1, March 2019.

Leonid Azriel, Ran Ginosar, Shay Gueron and Avi Mendelson, “Using Scan Side Channel to Detect IP Theft,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Special Issue on Hardware Security, 2017.

Leonid Azriel, Avi Mendelson and Uri Weiser: “Peripheral Memory: a Technique for Fighting Memory Bandwidth Bottleneck,” Computer Architecture Letters, 2014.

Conference Papers

S. Zaken, K. Meir, L. Azriel, T. Rindenau and A. Mendelson, “Exploring the Limitations of the Property-based Hardware-Trojan Detection Methods,” 2023 IEEE International Conference on Omni-layer Intelligent Systems (COINS), 2023.

Yaacov Belenky, Vadim Bugaenko, Leonid Azriel, et al: “Redundancy AES Masking Basis for Attack Mitigation (RAMBAM),” IACR Transactions on Cryptographic Hardware and Embedded Systems CHES, 2022(2), 69–91

Belenky, Y., Dushar, I., Teper, V., Chernyshchyk, H., Azriel, L., Kreimer, Y. (2021), “First Full-Fledged Side Channel Attack on HMAC-SHA-2,” In: Constructive Side-Channel Analysis and Secure Design. COSADE 2021

Albartus, N., Hoffmann, M., Temme, S., Azriel, L., & Paar, C. (2020). DANA Universal Dataflow Analysis for Gate-Level Netlist Reverse Engineering. IACR Transactions on Cryptographic Hardware and Embedded Systems CHES, 2020(4)

Leonid Azriel, Ran Ginosar and Avi Mendelson: “SoK: An Overview of Algorithmic Methods in IC Reverse Engineering,” 3rd Attacks and Solutions in Hardware Security Workshop (ASHES’19), November 15, 2019

Leonid Azriel, Ran Ginosar and Avi Mendelson: “Revealing On-chip Proprietary Security Functions with Scan Side Channel Based Reverse Engineering,” Great Lakes Symposium on VLSI 2017

Leonid Azriel, Shahar Kvatinsky, “Towards a Memristive Hardware Secure Hash Function (MemHash),” IEEE International Symposium on Hardware Oriented Security and Trust 2017 – HOST’17                      

Leonid Azriel, Ran Ginosar, Shay Gueron and Avi Mendelson, “Using Scan Side Channel for Detecting IP Theft,” 5th International workshop on Hardware and Architectural Support for Security and Privacy – HASP ’16                                                                       

 Preprints and Technical Reports

Leonid Azriel, Avi Mendelson, “Towards Open Scan for the Open-source Hardware,” IACR Cryptol. ePrint Arch. 2023: 1178 (2023)

Leonid Azriel, Ran Ginosar and Avi Mendelson, “Exploiting the Scan Side Channel for Reverse Engineering of a VLSI Device,” Technion, Israel Institute of Technology, Tech. Rep. CCIT Report # 897, May 2016.

Posters

Leonid Azriel, Ran Ginosar, Avi Mendelson: Scan Side Channel Analysis: a New Way for Non-Invasive Reverse Engineering of a VLSI Device, Technion Cyber Day, July 2015

Leonid Azriel, Ran Ginosar, Avi Mendelson: Infrastructure for Scan Side Channel-based Reverse Engineering, First Israeli Conference on Hardware and Side-Channel Attacks (FICHSA), May 2019

Leonid Azriel, Ran Ginosar, Avi Mendelson: Infrastructure for Scan Side Channel-based Reverse Engineering, Intel’s Security Conference, (iSecCon), May 2019                    

Talks

“Using Reverse Engineering Techniques to Build a Secure Open-Source IC,” Hardware Reverse Engineering Workshop (HARRIS) 2023

“How to trust your open-source RTL ASIC,”, Secure Hardware, Architectures and Operating Systems, SeHAS 2022

“Automating Hardware Reverse Engineering – Daydream or Reality,”, Secure Hardware, Architectures and Operating Systems, SeHAS 2021

“Scan Side Channel Analysis: a New Way for Non-Invasive Reverse Engineering of a VLSI Device,” ChipEx, May 2015                                                                                  

“Digging Out Proprietary Security Features from Hardware With a Scan Side Channel Attack,” IBM R&D Labs 2nd Security Research Seminar 2015

Patents

Ziv Hershman, Assaf Koren, Leonid Azriel: “Method and apparatus for limiting the output frequency of an on-chip clock generator,” US Patent 07472305.

Ohad Falik, Leonid Azriel: “Memory interface including an efficient variable-width bus,” US Patent 08200879.                                                                                             

Leonid Azriel, Ran Ginosar, Avi Mendelson: “Exploiting the scan test interface for reverse engineering of a vlsi device.” US Patent 10025896.

Nir Tasher, Valery Teper, Leonid Azriel, “Fault protection for high-fanout signal distribution circuitry.” US Patent 9397663

Dejan S. Milojicic, Leonid Azriel, Lukas Humbel, “Enforcement of Memory Reference Object Loading Indirection”, US Patent App. 15789155

Kvatinsky, Shahar, Azriel, Leonid, “Memristive Security Hash Function”, US Patent App. 15965924